1. Field
Embodiments of the present invention generally relate to an apparatus and methods for fabricating a photomask substrate for EUV applications and, more specifically, to an apparatus and methods for fabricating a photomask substrate with conductive contact from the apparatus to the photomask substrate during photomask fabrication process for EUV applications.
2. Description of the Related Art
In the manufacture of integrated circuits (IC), or chips, patterns representing different layers of the chip are created by a chip designer. A series of reusable masks, or photomasks, are created from these patterns in order to transfer the design of each chip layer onto a semiconductor substrate during the manufacturing process. Mask pattern generation systems use precision lasers or electron beams to image the design of each layer of the chip onto a respective mask. The masks are then used much like photographic negatives to transfer the circuit patterns for each layer onto a semiconductor substrate. These layers are built up using a sequence of processes and translate into the tiny transistors and electrical circuits that comprise each completed chip. Thus, any defects in the mask may be transferred to the chip, potentially adversely affecting chip performance. Defects that are severe enough may render the mask completely useless. Typically, a set of 15 to 30 masks is used to construct a chip and can be used repeatedly.
A photomask is typically a dielectric material, glass or a quartz substrate with a film stack having multiple layers. These layers may include a light-absorbing layer and an opaque layer disposed thereon. When manufacturing the photomask layer, a photoresist is typically disposed on the film stack to facilitate transferring features into the film stack during the subsequently patterning processes. During the patterning process, the circuit design is written onto the photomask by exposing portions of the photoresist to electron beam or ultraviolet light, making the exposed portions soluble in a developing solution. The soluble portion of the resist is then removed, allowing the exposed underlying film stack be etched. The etch process removes the film stack from the photomask at locations where the resist was removed, i.e., the exposed film stack is removed.
With the shrink of critical dimensions (CD), present optical lithography is approaching a technological limit at the 45 nanometer (nm) technology node. Next generation lithography (NGL) is expected to replace the conventional optical lithography, for example, in the 32 nm technology node and beyond. There are several NGL candidates, such as extreme ultraviolet (EUV) lithography (EUVL), electron projection lithography (EPL), ion projection lithography (IPL), nano-imprint, and X-ray lithography. Among these, EUVL is the most likely successor due to the fact that EUVL has most of the properties of optical lithography, which is more mature technology as compared with other NGL methods.
During an etching process for etching the film stack disposed on the photomask, an alternating current (AC) power is often supplied to a cathode (e.g., a substrate support) to generate a bias power to the photomask. However, alternating current power (AC) often includes multiple waveform phases. Different phase angles generated by the alternating current may result in ion bombardment of the photomask to be unpredictable across different regions of the photomask, thereby resulting non-uniform etching across the substrate surface. Furthermore, as the feature size on the photomask continues to get smaller, different phase angles of the alternating current may cause ions to travel in different directions or to different locations in the processing chamber, thus failing to penetrate into small features required to form the photomask, thereby resulting in defects or the formation of undesired profiles formed in the photomask.
Therefore, there is a need for supplying a steady current power during an etching process for forming a photomask for EUV technology.